The reference router implementation on the NetFPGA platform has been changed in order to hijack the incoming packets according to rules specified by the user through NetFPGA registers. This means that we are able to change any field of any incoming packets; of course, depending on whether we are changing TCP or IP header fields, we need to recompute the TCP or IP checksum and store them back into the packets. It might be useful to change information of the IP or TCP header or the data itself. For example, we could crypto the data, change the URL address in order to point to the desired web site or for URL filtering, change the priority information of a bunch of data, and much more. Our implementation works at user data path level and modifies packet fields if certain conditions defined by the user through NetFPGA registers are satisfied. The project has been implemented as a fully open-source project and serves as an exemplar project on how to build and distribute NetFPGA applications. All the code (Verilog, system software, graphical user interface, verification scripts, makefiles, and support tools) can be freely downloaded from the NetFPGA.org website.

A module for packet hijacking in NetFPGA platform

REFORGIATO RECUPERO, DIEGO ANGELO GAETANO;
2011

Abstract

The reference router implementation on the NetFPGA platform has been changed in order to hijack the incoming packets according to rules specified by the user through NetFPGA registers. This means that we are able to change any field of any incoming packets; of course, depending on whether we are changing TCP or IP header fields, we need to recompute the TCP or IP checksum and store them back into the packets. It might be useful to change information of the IP or TCP header or the data itself. For example, we could crypto the data, change the URL address in order to point to the desired web site or for URL filtering, change the priority information of a bunch of data, and much more. Our implementation works at user data path level and modifies packet fields if certain conditions defined by the user through NetFPGA registers are satisfied. The project has been implemented as a fully open-source project and serves as an exemplar project on how to build and distribute NetFPGA applications. All the code (Verilog, system software, graphical user interface, verification scripts, makefiles, and support tools) can be freely downloaded from the NetFPGA.org website.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11584/140142
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