The nSYNC chip is a radiation tolerant custom ASIC, developed in UMC 130 nm technology, and the main component of the new readout electronics for the LHCb Muon Detector Upgrade. The nSYNC has been developed in order to implement all the required functionalities for the readout upgrade in terms of timing alignment and measurements, and equipped also with control and monitoring features. The internal architecture of the chip, the data flow and test results on different nSYNC functionalities are presented.
The nSYNC ASIC for the new readout electronics of the LHCb Muon Detector Upgrade
Cadeddu S.;Casu L.;Brundu D.
;Cardini A.;Lai A.;Loi A.;
2019-01-01
Abstract
The nSYNC chip is a radiation tolerant custom ASIC, developed in UMC 130 nm technology, and the main component of the new readout electronics for the LHCb Muon Detector Upgrade. The nSYNC has been developed in order to implement all the required functionalities for the readout upgrade in terms of timing alignment and measurements, and equipped also with control and monitoring features. The internal architecture of the chip, the data flow and test results on different nSYNC functionalities are presented.
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