A bidirectional interface to the peripheral neural system based on a sigma delta recording unit and on a high voltage stimulator

Over the last years many scientific advances have been done on the development of neural prostheses [1] for hand amputees. Recent achievements in this field have made this challenge easier with the introduction of innovative biocompatible materials and the production of smart, light, artificial limbs characterized by lots of freedom degrees [2]. Despite such improvements, the communication between an implanted electrode and a prosthetic limb is still an open issue, due to long cables and cumbersome electronic equipments that typically separate them. In this contest it is very important the miniaturization of the electronic used to acquire the neural signals from efferent fibers of the Peripheral Nervous System (PNS) and to elicitate the afferent axons in order to restore the sensory feedback. Due to the weak amplitude of neural signals, this kind of design is particularly critical. Indeed neural signals are drowned in a noisy environment characterized by other biological electrical sources such as Electromyographic (EMG) interferences which have amplitudes many orders of magnitude greater than that of the neural signal and a bandwidth very close to them. The system proposed in this paper is based on a sigma delta converter divided into two main blocks: an on-chip analog front-end, that includes a sigma delta modulator and a digital part, realized off- chip on a FPGA. The main aim is to move the majority of the complexity on the digital side, keeping the analog part as simple as possible. The CMOS recording chip, designed on an AMS 0.35um process, contains 8 parallel readout channels and has a 4.1mm x 4.1mm die size. Several parameters (amplifier gain, opamp bandwidths, etc.) are programmable. Fig. 1 shows the chip test results for an input trace obtained from real measurements of an electrode implanted in a rat sciatic nerve. The original signal is largely affected by low-frequency noise (ECG and EMG) which is completely removed by the system. Regarding the stimulation unit another CMOS analog chip has been designed. It is able to deliver biphasic current pulses whose shape and parameters are summarized in Fig. 2 (on the left). The system is based on a single supply with anodic and cathodic active phases. Fig. 2 (on the right) shows the stimulation diagram. The stimulation is enabled by closing switch S1 whereas with switch S2 it is possible to select between anodic or cathodic phase. Even though the positive and negative currents have the same value, a residual charge can be accumulated at the electrode-nerve interface due to mismatches in the two current paths. As a result, some electrochemical damaging processes can occur at this interface. Therefore, to avoid charge accumulation, a periodic charge cancellation phase is necessary. A switch S3 has been introduced to periodically shortcut the two electrode terminals removing all the stored charge. Due to the high value and to the high variability of the electrode-tissue impedance, a programmable high voltage stimulator is required. The designed stimulation system (Fig. 3) is based on a low voltage 6-bit current DAC used to setup the stimulation current level. The current is then converted from a low into a high voltage signal by the output stage and injected into the nerve. The high voltage supply for the output stage is generated by a programmable voltage booster that increases the voltage up to 20V. The stimulation unit and in particular the voltage booster has been designed achieving a good compromise between size and boosting time. The IC has been designed on an AMS High Voltage 0.35um CMOS process which includes both low voltage and high voltage transistors. Fig. 4 shows the stimulating chip layout.