PALUMBO, FRANCESCA

PALUMBO, FRANCESCA  

DIPARTIMENTO DI INGEGNERIA ELETTRICA ED ELETTRONICA  

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Risultati 1 - 20 di 53 (tempo di esecuzione: 0.03 secondi).
Titolo Data di pubblicazione Autore(i) Rivista Editore
Design and management of image processing pipelines within CPS: Acquired experience towards the end of the FitOptiVis ECSEL Project 1-gen-2021 Sau, C.; Rinaldi, C.; Pomante, L.; Palumbo, F.; Valente, G.; Fanni, T.; Martinez, M.; van der Linden, F.; Basten, T.; Geilen, M.; Peeren, G.; Kadlec, J.; Jaaskelainen, P.; Bulej, L.; Barranco, F.; Saarinen, J.; Santti, T.; Zedda, M. K.; Sanchez, V.; Nikkhah, S. T.; Goswami, D.; Amat, G.; Marsik, L.; van Helvoort, M.; Medina, L.; Al-Ars, Z.; de Beer, A. MICROPROCESSORS AND MICROSYSTEMS -
Feasibility study and porting of the damped least square algorithm on FPGA 1-gen-2020 Sau, C.; Fanni, T.; Rubattu, C.; Fanni, L.; Raffo, L.; Palumbo, F. IEEE ACCESS -
NeuPow: A CAD Methodology for High-level Power Estimation Based on Machine Learning 1-gen-2020 Nasser, Y.; Sau, C.; Prevotet, J. -C.; Fanni, T.; Palumbo, F.; Helard, M.; Raffo, L. ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS -
The Multi-Dataflow Composer tool: An open-source tool suite for optimized coarse-grain reconfigurable hardware accelerators and platform design 1-gen-2020 Sau, C.; Fanni, T.; Rubattu, C.; Raffo, L.; Palumbo, F. MICROPROCESSORS AND MICROSYSTEMS -
An integrated hardware/software design methodology for signal processing systems 1-gen-2019 Li, L.; Sau, C.; Fanni, T.; Li, J.; Viitanen, T.; Christophe, F.; Palumbo, F.; Raffo, L.; Huttunen, H.; Takala, J.; Bhattacharyya, S. S. JOURNAL OF SYSTEMS ARCHITECTURE -
Dataflow-functional high-level synthesis for coarse-grained reconfigurable accelerators 1-gen-2019 Rubattu, Claudio; Palumbo, Francesca; Sau, Carlo; Salvador, Ruben; Serot, Jocelyn; Desnos, Karol; Raffo, Luigi; Pelcat, Maxime IEEE EMBEDDED SYSTEMS LETTERS -
Neu Pow: Artificial Neural Networks for Power and Behavioral Modeling of Arithmetic Components in 45nm ASICs Technology 1-gen-2019 Nasser, Y.; Sau, C.; Prevotet, J. -C.; Fanni, T.; Palumbo, F.; Helard, M.; Raffo, L. - Association for Computing Machinery, Inc
Optimization and deployment of CNNs at the Edge: The ALOHA experience 1-gen-2019 Meloni, P.; Loi, D.; Busia, P.; Deriu, G.; Pimentel, A. D.; Sapra, D.; Stefanov, T.; Minakova, S.; Conti, F.; Benini, L.; Pintor, M.; Biggio, B.; Moser, B.; Shepelev, N.; Fragoulis, N.; Theodorakopoulos, I.; Masin, M.; Palumbo, F. - Association for Computing Machinery, Inc
Reconfigurable Adaptive Multiple Transform Hardware Solutions for Versatile Video Coding 1-gen-2019 Sau, C.; Ligas, D.; Fanni, T.; Raffo, L.; Palumbo, F. IEEE ACCESS -
ALOHA: An architectural-aware framework for deep learning at the edge 1-gen-2018 Meloni, P.; Loi, D.; Deriu, G.; Ripolles, O.; Solans, D.; Pimentel, A. D.; Sapra, D.; Pintor, Maura; Biggio, B.; Moser, B.; Shepeleva, N.; Stefanov, T.; Minakova, S.; Conti, F.; Benini, L.; Fragoulis, N.; Theodorakopoulos, I.; Masin, M.; Palumbo, F. - Association for Computing Machinery
Architecture-aware design and implementation of CNN algorithms for embedded inference: The ALOHA project 1-gen-2018 Meloni, P.; Loi, D.; Deriu, G.; Pimentel, A. D.; Saprat, D.; Pintor, M.; Biggio, B.; Ripolles, O.; Solans, D.; Conti, F.; Benini, L.; Stefanov, T.; Minakova, S.; Moser, B.; Shepeleva, N.; Masin, M.; Palumbo, F.; Fragoulis, N.; Theodorakopoulos, I. - Institute of Electrical and Electronics Engineers Inc.
Multi-Grain Reconfiguration for Advanced Adaptivity in Cyber-Physical Systems 1-gen-2018 Fanni, T; Rodriguez, A; Sau, C; Suriano, L; Palumbo, F; Raffo, L; de la Torre, E - IEEE
An FPGA platform for real-time simulation of spiking neuronal networks 1-gen-2017 Pani, Danilo; Meloni, Paolo; Tuveri, Giuseppe; Palumbo, Francesca; Massobrio, Paolo; Raffo, Luigi FRONTIERS IN NEUROSCIENCE -
Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing 1-gen-2017 Sau, Carlo; Palumbo, Francesca; Pelcat, M; Heulot, J; Nogues, E; Menard, D; Meloni, Paolo; Raffo, Luigi IEEE EMBEDDED SYSTEMS LETTERS -
Power-Awarness in Coarse-Grained Reconfigurable Multi-Functional Architectures: a Dataflow Based Strategy 1-gen-2017 Palumbo, Francesca; Fanni, Tiziana; Sau, Carlo; Meloni, Paolo JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL, IMAGE, AND VIDEO TECHNOLOGY -
Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs 1-gen-2017 Meloni, P.; Rubattu, C.; Tuveri, G.; Pani, D.; Raffo, L.; Palumbo, F. JOURNAL OF SYSTEMS ARCHITECTURE -
Adaptable AES implementation with power-gating support 1-gen-2016 Banik, Subhadeep; Bogdanov, Andrey; Fanni, Tiziana; Sau, Carlo; Raffo, Luigi; Palumbo, Francesca; Regazzoni, Francesco - Association for Computing Machinery, Inc
Automated Design Flow for Multi-Functional Dataflow-Based Platforms 1-gen-2016 Sau, Carlo; Meloni, Paolo; Raffo, Luigi; Palumbo, Francesca; Bezati, E; Casale Brunet, S; Mattavelli, M. JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL, IMAGE, AND VIDEO TECHNOLOGY -
Early Stage Automatic Strategy for Power-Aware Signal Processing Systems Design 1-gen-2016 Sau, Carlo; Carta, N; Raffo, Luigi; Palumbo, Francesca JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL, IMAGE, AND VIDEO TECHNOLOGY -
Modelling and automated implementation of optimal power saving strategies in coarse-grained reconfigurable architectures 1-gen-2016 Palumbo, Francesca; Fanni, Tiziana; Sau, Carlo; Meloni, Paolo; Raffo, Luigi JOURNAL OF ELECTRICAL AND COMPUTER ENGINEERING -