RATTO, FRANCESCO
RATTO, FRANCESCO
DIPARTIMENTO DI INGEGNERIA ELETTRICA ED ELETTRONICA
Integrating FPGA-Based Acceleration in Industrial Motion Control System
2025-01-01 Rubattu, Claudio; Ledda, Antonio; Ratto, Francesco; Jugade, Chaitanya; Goswami, Dip; Palumbo, Francesca
Multi-Partner Project: Key Enabling Technologies for Cognitive Computing Continuum - MYRTUS Project Perspective
2025-01-01 Palumbo, Francesca; Ratto, Francesco; Rubattu, Claudio; Zedda, Maria Katiuscia; Fanni, Tiziana; Rao, Veena; Driessen, Bart; Castrillon, Jeronimo
ONNX-To-Hardware Design Flow for Adaptive Neural-Network Inference on FPGAs
2025-01-01 Manca, Federico; Ratto, Francesco; Palumbo, Francesca
Design methodologies and architectures for application-specific coarse-grain reconfigurable accelerators
2024-02-15
FPGA-based Implementation for Industrial Motion Control System
2024-01-01 Rubattu, Claudio; Ledda, Antonio; Ratto, Francesco; Jugade, Chaitanya; Goswami, Dip; Palumbo, Francesca
A multithread AES accelerator for Cyber-Physical Systems
2023-01-01 Ratto, Francesco; Raffo, Luigi; Palumbo, Francesca
An Automated Design Flow for Adaptive Neural Network Hardware Accelerators
2023-01-01 Ratto, F.; Mainez, A. P.; Sau, C.; Meloni, P.; Deriu, G.; Delucchi, S.; Massa, M.; Raffo, L.; Palumbo, F.
Multithread Accelerators on FPGAs: A Dataflow-Based Approach
2022-01-01 Ratto, F.; Esposito, S.; Sau, C.; Raffo, L.; Palumbo, F.
Mutual Impact between Clock Gating and High Level Synthesis in Reconfigurable Hardware Accelerators
2021-01-01 Ratto, Francesco; Fanni, Tiziana; Raffo, Luigi; Sau, Carlo
| Titolo | Data di pubblicazione | Autore(i) | Rivista | Editore |
|---|---|---|---|---|
| Integrating FPGA-Based Acceleration in Industrial Motion Control System | 1-gen-2025 | Rubattu, Claudio; Ledda, Antonio; Ratto, Francesco; Jugade, Chaitanya; Goswami, Dip; Palumbo, Francesca | IEEE OPEN JOURNAL OF THE INDUSTRIAL ELECTRONICS SOCIETY | - |
| Multi-Partner Project: Key Enabling Technologies for Cognitive Computing Continuum - MYRTUS Project Perspective | 1-gen-2025 | Palumbo, Francesca; Ratto, Francesco; Rubattu, Claudio; Zedda, Maria Katiuscia; Fanni, Tiziana; Rao, Veena; Driessen, Bart; Castrillon, Jeronimo | - | Institute of Electrical and Electronics Engineers Inc. |
| ONNX-To-Hardware Design Flow for Adaptive Neural-Network Inference on FPGAs | 1-gen-2025 | Manca, Federico; Ratto, Francesco; Palumbo, Francesca | - | Springer Science and Business Media Deutschland GmbH |
| Design methodologies and architectures for application-specific coarse-grain reconfigurable accelerators | 15-feb-2024 | - | - | Università degli Studi di Cagliari |
| FPGA-based Implementation for Industrial Motion Control System | 1-gen-2024 | Rubattu, Claudio; Ledda, Antonio; Ratto, Francesco; Jugade, Chaitanya; Goswami, Dip; Palumbo, Francesca | - | Institute of Electrical and Electronics Engineers Inc. |
| A multithread AES accelerator for Cyber-Physical Systems | 1-gen-2023 | Ratto, Francesco; Raffo, Luigi; Palumbo, Francesca | - | The Association for Computing Machinery |
| An Automated Design Flow for Adaptive Neural Network Hardware Accelerators | 1-gen-2023 | Ratto, F.; Mainez, A. P.; Sau, C.; Meloni, P.; Deriu, G.; Delucchi, S.; Massa, M.; Raffo, L.; Palumbo, F. | JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL, IMAGE, AND VIDEO TECHNOLOGY | - |
| Multithread Accelerators on FPGAs: A Dataflow-Based Approach | 1-gen-2022 | Ratto, F.; Esposito, S.; Sau, C.; Raffo, L.; Palumbo, F. | - | - |
| Mutual Impact between Clock Gating and High Level Synthesis in Reconfigurable Hardware Accelerators | 1-gen-2021 | Ratto, Francesco; Fanni, Tiziana; Raffo, Luigi; Sau, Carlo | ELECTRONICS | - |