NoCs performance are usually explored stand-alone, overlooking the impact of the higher communication levels in the ISO OSI micronetwork stack. Nevertheless, since CPUs have to be relieved of communication management, higher communication levels such as DMA engines necessarily influence the communication performance. In this paper, we investigate how two different DMA implementations, full-duplex and half-duplex, can bias the behaviour of a NoC designed for MPP architectures. From our studies, it turned out that a full-duplex DMA is more effective in preventing possible deadlock situations. Moreover, a deep performance analysis of a state-of-the-art NoC, in terms of transactions completion time, queuing time and injection delay, confirms the impact of the DMA in NoC-based MPP platforms, showing the advantages of a full-duplex approach.

Impact of half-duplex and full-duplex DMA Implementations on NoC performance

PALUMBO, FRANCESCA;PANI, DANILO;RAFFO, LUIGI
2010-01-01

Abstract

NoCs performance are usually explored stand-alone, overlooking the impact of the higher communication levels in the ISO OSI micronetwork stack. Nevertheless, since CPUs have to be relieved of communication management, higher communication levels such as DMA engines necessarily influence the communication performance. In this paper, we investigate how two different DMA implementations, full-duplex and half-duplex, can bias the behaviour of a NoC designed for MPP architectures. From our studies, it turned out that a full-duplex DMA is more effective in preventing possible deadlock situations. Moreover, a deep performance analysis of a state-of-the-art NoC, in terms of transactions completion time, queuing time and injection delay, confirms the impact of the DMA in NoC-based MPP platforms, showing the advantages of a full-duplex approach.
2010
978-1-4244-7085-3
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11584/109985
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