InAs nanowire-based back-gated field-effect transistors realized starting from individual InAs nanowires are investigated at different temperatures and as building blocks of inverter circuits for logic applications. The nanodevices show n-type behavior with a carrier concentration up to 8.0 × 1017 cm−3 and corresponding electron mobility exceeding 1590 and 1940 cm2 V−1 s−1 at room temperature and 200 K, respectively. The investigation over a wide temperature range indicates no Schottky barrier at source/drain electrodes, where Ohmic contacts are formed with the Cr adhesion layer. The switching characteristics of the devices improve with decreasing temperature and a subthreshold swing less than 1 V/decade is achieved at 200 K, suggesting the occurrence of a trap population with density around 4 × 108 cm−1 eV−1. Besides, the nanodevices are exploited in single-transistor circuits with a resistive load. As an inverter, the circuit shows 30 % and 24 % of the voltage supply noise margins for the high and low states, respectively; as a low signal amplifier, it shows a gain that is weakly dependent on temperature. The present study highlights the impact of temperature on the operation of InAs nanowire-based back-gated transistors and evidences their potential applications in logic circuits including inverters and low-signal amplifiers.

Temperature behavior and logic circuit applications of InAs nanowire-based field-effect transistors

Demontis, Valeria;
2024-01-01

Abstract

InAs nanowire-based back-gated field-effect transistors realized starting from individual InAs nanowires are investigated at different temperatures and as building blocks of inverter circuits for logic applications. The nanodevices show n-type behavior with a carrier concentration up to 8.0 × 1017 cm−3 and corresponding electron mobility exceeding 1590 and 1940 cm2 V−1 s−1 at room temperature and 200 K, respectively. The investigation over a wide temperature range indicates no Schottky barrier at source/drain electrodes, where Ohmic contacts are formed with the Cr adhesion layer. The switching characteristics of the devices improve with decreasing temperature and a subthreshold swing less than 1 V/decade is achieved at 200 K, suggesting the occurrence of a trap population with density around 4 × 108 cm−1 eV−1. Besides, the nanodevices are exploited in single-transistor circuits with a resistive load. As an inverter, the circuit shows 30 % and 24 % of the voltage supply noise margins for the high and low states, respectively; as a low signal amplifier, it shows a gain that is weakly dependent on temperature. The present study highlights the impact of temperature on the operation of InAs nanowire-based back-gated transistors and evidences their potential applications in logic circuits including inverters and low-signal amplifiers.
2024
Indium arsenide (InAs); Nanowire; Transistor; Schottky barrier; Trap state; Inverter
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11584/390844
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