Aggressively Scaled T-Gated GaN-on-Silicon RF Power HEMT Featuring Step Graded SRL-AlGaN Buffer for Next Generation Broad Band Power Amplifiers

GaN HEMT has gained much interest recently because of its widespread uses, which range from high voltage systems used in power electronic devices to RF power amplifiers. The industry is currently focusing on developing GaN HEMT on Silicon-substrate in order to lower costs and integrate GaN technology with Si-based components. In this work, the RF power performance of T-gate with novel step graded strain relief layered GaN[sbnd]HEMT analyzed on Si (Silicon) wafer by Silvaco simulation TCAD tool. The effect of gate length (LG), gate recess (GR), work function, gate-to-source (LGS) length scaling, and gate-to-drain (LGD) length scaling was studied. The GM (transconductance) observed maximum value in this work is 936.40 mS/mm, and the maximum drain current (ID) reached 1.96 A/mm for HEMT with LG= 40 nm. The cut-off frequency (fT) observed with the minimum LGS of 150 nm is 442.59 GHz. Decreasing the gate length resulted in higher transconductance, drain current, and cut-off frequency (fT), with no alteration in the threshold voltage. In addition, the results of LG scaling on GM & other capacitance parameters have been analysed, which prefer a best way for boosting DC & RF performances of GaN[sbnd]HEMTs. Reducing the LGS and LGD distances in this HEMT minimizes the channel length, allowing for faster carrier transport and increasing both the transconductance (GM) and drain current. This adjustment enhances current flow without altering the threshold voltage, as the gate control over the channel remains unaffected.