TUVERI, GIUSEPPE
TUVERI, GIUSEPPE
DIPARTIMENTO DI INGEGNERIA ELETTRICA ED ELETTRONICA
An FPGA platform for real-time simulation of spiking neuronal networks
2017-01-01 Pani, Danilo; Meloni, Paolo; Tuveri, Giuseppe; Palumbo, Francesca; Massobrio, Paolo; Raffo, Luigi
On-FPGA real-time processing of biological signals from high-density MEAs: A design space exploration
2017-01-01 Seu, Giovanni Pietro; Angotzi, Gian Nicola; Tuveri, Giuseppe; Raffo, Luigi; Berdondini, Luca; Maccione, Alessandro; Meloni, Paolo
Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs
2017-01-01 Meloni, P.; Rubattu, C.; Tuveri, G.; Pani, D.; Raffo, L.; Palumbo, F.
MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation
2016-01-01 Meloni, Paolo; Palumbo, Francesca; Rubattu, Claudio; Tuveri, Giuseppe; Pani, Danilo; Raffo, Luigi
On-the-fly adaptivity for process networks over shared-memory platforms
2016-01-01 Tuveri, Giuseppe; Meloni, Paolo; Palumbo, Francesca; Pietro Seu, Giovanni; Loi, Igor; Conti, Francesco; Raffo, Luigi
Exploring custom heterogeneous MPSoCs for real-time neural signal decoding
2015-01-01 Meloni, Paolo; Tuveri, Giuseppe; Pani, Danilo; Raffo, Luigi; Palumbo, Francesca
A custom MPSoC architecture with integrated power management for real-time neural signal decoding
2014-01-01 Carta, N; Meloni, Paolo; Tuveri, Giuseppe; Pani, Danilo; Raffo, Luigi
A stream buffer mechanism for pervasive splitting transformations on polyhedral process networks
2014-01-01 Meloni, Paolo; Tuveri, Giuseppe; Raffo, Luigi; Loi, I; Conti, F.
Online process transformation for polyhedral process networks in shared-memory MPSoCs
2014-01-01 Meloni, Paolo; Tuveri, Giuseppe; Raffo, Luigi; Loi, I; Conti, F.
A low overhead self-adaptation technique for KPN applications on NoC-based MPSoCs
2013-01-01 Derin, O; Ramankutty, P; Meloni, Paolo; Tuveri, Giuseppe
A runtime adaptive H.264 video-decoding MPSoC platform
2013-01-01 Tuveri, Giuseppe; Secchi, S; Meloni, Paolo; Raffo, Luigi; Cannella, E.
A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project
2013-01-01 Derin, O; Cannella, E; Tuveri, Giuseppe; Meloni, Paolo; Stefanov, T; Fiorin, L; Raffo, Luigi; Sami, M.
ASAM: Automatic architecture synthesis and application mapping
2013-01-01 Jozwiak, L; Lindwer, M; Corvino, R; Meloni, Paolo; Micconi, L; Madsen, J; Diken, E; Gangadharan, D; Jordans, R; Pomata, S; Pop, P; Tuveri, Giuseppe; Raffo, Luigi; Notarangelo, G.
Integrated support for Adaptivity and Fault-tolerance in MPSoCs
2013-05-03
Adaptivity support for MPSoCs based on process migration in polyhedral process networks
2012-01-01 Cannella, E; Derin, O; Meloni, Paolo; Tuveri, Giuseppe; Stefanov, T.
ASAM: Automatic Architecture Synthesis and Application Mapping
2012-01-01 Jozwiak, L.; Lindwer, M.; Corvino, R; Meloni, Paolo; Micconi, L; Madsen, J; Diken, E; Gangadharan, D; Jordans, R; Pomata, S; Pop, P; Tuveri, Giuseppe; Raffo, Luigi
Enabling fast ASIP design space exploration: An FPGA-based runtime reconfigurable prototyper
2012-01-01 Meloni, Paolo; Pomata, S; Tuveri, Giuseppe; Secchi, S; Raffo, Luigi; Lindwer, M.
Exploiting binary translation for fast ASIP design space exploration on FPGAs
2012-01-01 Pomata, S; Meloni, Paolo; Tuveri, Giuseppe; Raffo, Luigi; Lindwer, M.
System adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project approach
2012-01-01 Meloni, Paolo; Tuveri, Giuseppe; Raffo, Luigi; Cannella, E; Stefanov, T; Derin, O; Fiorin, L; Sami, M.
| Titolo | Data di pubblicazione | Autore(i) | Rivista | Editore |
|---|---|---|---|---|
| An FPGA platform for real-time simulation of spiking neuronal networks | 1-gen-2017 | Pani, Danilo; Meloni, Paolo; Tuveri, Giuseppe; Palumbo, Francesca; Massobrio, Paolo; Raffo, Luigi | FRONTIERS IN NEUROSCIENCE | - |
| On-FPGA real-time processing of biological signals from high-density MEAs: A design space exploration | 1-gen-2017 | Seu, Giovanni Pietro; Angotzi, Gian Nicola; Tuveri, Giuseppe; Raffo, Luigi; Berdondini, Luca; Maccione, Alessandro; Meloni, Paolo | - | Institute of Electrical and Electronics Engineers Inc. |
| Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs | 1-gen-2017 | Meloni, P.; Rubattu, C.; Tuveri, G.; Pani, D.; Raffo, L.; Palumbo, F. | JOURNAL OF SYSTEMS ARCHITECTURE | - |
| MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation | 1-gen-2016 | Meloni, Paolo; Palumbo, Francesca; Rubattu, Claudio; Tuveri, Giuseppe; Pani, Danilo; Raffo, Luigi | MICROPROCESSORS AND MICROSYSTEMS | - |
| On-the-fly adaptivity for process networks over shared-memory platforms | 1-gen-2016 | Tuveri, Giuseppe; Meloni, Paolo; Palumbo, Francesca; Pietro Seu, Giovanni; Loi, Igor; Conti, Francesco; Raffo, Luigi | MICROPROCESSORS AND MICROSYSTEMS | - |
| Exploring custom heterogeneous MPSoCs for real-time neural signal decoding | 1-gen-2015 | Meloni, Paolo; Tuveri, Giuseppe; Pani, Danilo; Raffo, Luigi; Palumbo, Francesca | - | IEEE, Institute of Electrical and Electronics Engineers |
| A custom MPSoC architecture with integrated power management for real-time neural signal decoding | 1-gen-2014 | Carta, N; Meloni, Paolo; Tuveri, Giuseppe; Pani, Danilo; Raffo, Luigi | IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS | - |
| A stream buffer mechanism for pervasive splitting transformations on polyhedral process networks | 1-gen-2014 | Meloni, Paolo; Tuveri, Giuseppe; Raffo, Luigi; Loi, I; Conti, F. | ACM INTERNATIONAL CONFERENCE PROCEEDINGS SERIES | ACM Digital Library |
| Online process transformation for polyhedral process networks in shared-memory MPSoCs | 1-gen-2014 | Meloni, Paolo; Tuveri, Giuseppe; Raffo, Luigi; Loi, I; Conti, F. | - | IEEE |
| A low overhead self-adaptation technique for KPN applications on NoC-based MPSoCs | 1-gen-2013 | Derin, O; Ramankutty, P; Meloni, Paolo; Tuveri, Giuseppe | - | IEEE |
| A runtime adaptive H.264 video-decoding MPSoC platform | 1-gen-2013 | Tuveri, Giuseppe; Secchi, S; Meloni, Paolo; Raffo, Luigi; Cannella, E. | - | IEEE |
| A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project | 1-gen-2013 | Derin, O; Cannella, E; Tuveri, Giuseppe; Meloni, Paolo; Stefanov, T; Fiorin, L; Raffo, Luigi; Sami, M. | MICROPROCESSORS AND MICROSYSTEMS | - |
| ASAM: Automatic architecture synthesis and application mapping | 1-gen-2013 | Jozwiak, L; Lindwer, M; Corvino, R; Meloni, Paolo; Micconi, L; Madsen, J; Diken, E; Gangadharan, D; Jordans, R; Pomata, S; Pop, P; Tuveri, Giuseppe; Raffo, Luigi; Notarangelo, G. | MICROPROCESSORS AND MICROSYSTEMS | - |
| Integrated support for Adaptivity and Fault-tolerance in MPSoCs | 3-mag-2013 | - | - | Università degli Studi di Cagliari |
| Adaptivity support for MPSoCs based on process migration in polyhedral process networks | 1-gen-2012 | Cannella, E; Derin, O; Meloni, Paolo; Tuveri, Giuseppe; Stefanov, T. | VLSI DESIGN | - |
| ASAM: Automatic Architecture Synthesis and Application Mapping | 1-gen-2012 | Jozwiak, L.; Lindwer, M.; Corvino, R; Meloni, Paolo; Micconi, L; Madsen, J; Diken, E; Gangadharan, D; Jordans, R; Pomata, S; Pop, P; Tuveri, Giuseppe; Raffo, Luigi | - | IEEE |
| Enabling fast ASIP design space exploration: An FPGA-based runtime reconfigurable prototyper | 1-gen-2012 | Meloni, Paolo; Pomata, S; Tuveri, Giuseppe; Secchi, S; Raffo, Luigi; Lindwer, M. | VLSI DESIGN | - |
| Exploiting binary translation for fast ASIP design space exploration on FPGAs | 1-gen-2012 | Pomata, S; Meloni, Paolo; Tuveri, Giuseppe; Raffo, Luigi; Lindwer, M. | - | IEEE |
| System adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project approach | 1-gen-2012 | Meloni, Paolo; Tuveri, Giuseppe; Raffo, Luigi; Cannella, E; Stefanov, T; Derin, O; Fiorin, L; Sami, M. | - | IEEE |