The growing complexity of digital architectures strongly impacts on their verification phase, which becomes critical. In fact, without giving up cycle-accuracy, it seems there are not at the state-of-the-art fast frameworks allowing multi-parametric simulations at a fine granularity level for accurate verification and design space exploration purposes. In this paper, we propose a parallel, fast and cycle-accurate SystemC simulation framework: SysCgrid. SysCgrid is designed to provide automatic generation and parallel execution of multi-parametric simulations with minimum effort by hardware architects. This framework is conceived to run on a cluster/grid computing infrastructure, exploiting the message passing interface (MPI) to automatically distribute the multi-parametric simulation set over more than one node. The achieved results on a network-on-chip (NoC) architecture verification demonstrate the good SysCgrid scalability, both in case of shared and non-shared memory computing infrastructures, achieving impressive speed up with respect to traditional single-run simulations approaches.

A fast MPI-based parallel framework for cycle-accurate HDL multi-parametric simulations

PANI, DANILO;PALUMBO, FRANCESCA;RAFFO, LUIGI
2010-01-01

Abstract

The growing complexity of digital architectures strongly impacts on their verification phase, which becomes critical. In fact, without giving up cycle-accuracy, it seems there are not at the state-of-the-art fast frameworks allowing multi-parametric simulations at a fine granularity level for accurate verification and design space exploration purposes. In this paper, we propose a parallel, fast and cycle-accurate SystemC simulation framework: SysCgrid. SysCgrid is designed to provide automatic generation and parallel execution of multi-parametric simulations with minimum effort by hardware architects. This framework is conceived to run on a cluster/grid computing infrastructure, exploiting the message passing interface (MPI) to automatically distribute the multi-parametric simulation set over more than one node. The achieved results on a network-on-chip (NoC) architecture verification demonstrate the good SysCgrid scalability, both in case of shared and non-shared memory computing infrastructures, achieving impressive speed up with respect to traditional single-run simulations approaches.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11584/105497
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