In this paper, we propose a reconfigurable design of the Ad-vanced Encryption Standard capable of adapting at run-Time to the requirements of the target application. Reconfiguration is achieved by activating only a specific subset of all the instantiated processing elements. Further, we explore the effectiveness of power gating and clock gating methodologies to minimize the energy consumption of the processing elements not involved in computation.

Adaptable AES implementation with power-gating support

FANNI, TIZIANA;SAU, CARLO;RAFFO, LUIGI;PALUMBO, FRANCESCA;
2016

Abstract

In this paper, we propose a reconfigurable design of the Ad-vanced Encryption Standard capable of adapting at run-Time to the requirements of the target application. Reconfiguration is achieved by activating only a specific subset of all the instantiated processing elements. Further, we explore the effectiveness of power gating and clock gating methodologies to minimize the energy consumption of the processing elements not involved in computation.
9781450341288
AES; Coarse-Grained Reconfigurable Systems; Low Energy; Power Gating; Run-Time Adaptive Systems; Security; Software
File in questo prodotto:
File Dimensione Formato  
Final_with_copyright.pdf

Solo gestori archivio

Tipologia: versione editoriale
Dimensione 449.84 kB
Formato Adobe PDF
449.84 kB Adobe PDF   Visualizza/Apri   Richiedi una copia

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11584/178557
Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus 3
  • ???jsp.display-item.citation.isi??? 2
social impact