MELONI, PAOLO

MELONI, PAOLO  

DIPARTIMENTO DI INGEGNERIA ELETTRICA ED ELETTRONICA  

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Risultati 1 - 20 di 71 (tempo di esecuzione: 0.051 secondi).
Titolo Data di pubblicazione Autore(i) Rivista Editore
A Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs 1-gen-2007 Angiolini, F; Meloni, Paolo; Carta, SALVATORE MARIO; Raffo, Luigi; Benini, L. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS -
A low overhead self-adaptation technique for KPN applications on NoC-based MPSoCs 1-gen-2013 Derin, O; Ramankutty, P; Meloni, Paolo; Tuveri, Giuseppe - IEEE
A runtime adaptive H.264 video-decoding MPSoC platform 1-gen-2013 Tuveri, Giuseppe; Secchi, S; Meloni, Paolo; Raffo, Luigi; Cannella, E. - IEEE
A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project 1-gen-2013 Derin, O; Cannella, E; Tuveri, Giuseppe; Meloni, Paolo; Stefanov, T; Fiorin, L; Raffo, Luigi; Sami, M. MICROPROCESSORS AND MICROSYSTEMS -
An Adaptable Cognitive Microcontroller Node for Fitness Activity Recognition 1-gen-2022 Scrugli, M. A.; Blazica, B.; Meloni, P. - Springer Science and Business Media Deutschland GmbH
An Adaptive Cognitive Sensor Node for ECG Monitoring in the Internet of Medical Things 1-gen-2022 Scrugli, M. A.; Loi, D.; Raffo, L.; Meloni, P. IEEE ACCESS -
Adaptivity support for MPSoCs based on process migration in polyhedral process networks 1-gen-2012 Cannella, E; Derin, O; Meloni, Paolo; Tuveri, Giuseppe; Stefanov, T. VLSI DESIGN -
ALOHA: A Unified Platform-Aware Evaluation Method for CNNs Execution on Heterogeneous Systems at the Edge 1-gen-2021 Busia, Paola; Minakova, Svetlana; Stefanov, Todor; Raffo, Luigi; Meloni, Paolo IEEE ACCESS -
ALOHA: An architectural-aware framework for deep learning at the edge 1-gen-2018 Meloni, P.; Loi, D.; Deriu, G.; Ripolles, O.; Solans, D.; Pimentel, A. D.; Sapra, D.; Pintor, Maura; Biggio, B.; Moser, B.; Shepeleva, N.; Stefanov, T.; Minakova, S.; Conti, F.; Benini, L.; Fragoulis, N.; Theodorakopoulos, I.; Masin, M.; Palumbo, F. - Association for Computing Machinery
An FPGA Research Environment for Rapid MPSoC Exploration 1-gen-2009 Secchi, S; Meloni, Paolo; Raffo, Luigi - -
An FPGA-Based Framework for Technology-Aware Prototyping of Multicore Embedded Architectures 1-gen-2010 Meloni, Paolo; Secchi, S; Raffo, Luigi IEEE EMBEDDED SYSTEMS LETTERS -
Architecture-aware design and implementation of CNN algorithms for embedded inference: The ALOHA project 1-gen-2018 Meloni, P.; Loi, D.; Deriu, G.; Pimentel, A. D.; Saprat, D.; Pintor, M.; Biggio, B.; Ripolles, O.; Solans, D.; Conti, F.; Benini, L.; Stefanov, T.; Minakova, S.; Moser, B.; Shepeleva, N.; Masin, M.; Palumbo, F.; Fragoulis, N.; Theodorakopoulos, I. - Institute of Electrical and Electronics Engineers Inc.
Area and Power Modeling for Networks-on-Chip with Layout Awareness 1-gen-2007 Meloni, Paolo; Loi, I; Angiolini, F; Carta, SALVATORE MARIO; Barbaro, Massimo; Raffo, Luigi; Benini, L. VLSI DESIGN -
Area and Power Modeling Methodologies for Networks-on-Chip 1-gen-2006 Meloni, Paolo; Carta, SALVATORE MARIO; R., Argiolas; Raffo, Luigi; F., Angiolini - -
ASAM: Automatic Architecture Synthesis and Application Mapping 1-gen-2012 Jozwiak, L.; Lindwer, M.; Corvino, R; Meloni, Paolo; Micconi, L; Madsen, J; Diken, E; Gangadharan, D; Jordans, R; Pomata, S; Pop, P; Tuveri, Giuseppe; Raffo, Luigi - IEEE
ASAM: Automatic architecture synthesis and application mapping 1-gen-2013 Jozwiak, L; Lindwer, M; Corvino, R; Meloni, Paolo; Micconi, L; Madsen, J; Diken, E; Gangadharan, D; Jordans, R; Pomata, S; Pop, P; Tuveri, Giuseppe; Raffo, Luigi; Notarangelo, G. MICROPROCESSORS AND MICROSYSTEMS -
Automated Design Flow for Multi-Functional Dataflow-Based Platforms 1-gen-2016 Sau, Carlo; Meloni, Paolo; Raffo, Luigi; Palumbo, Francesca; Bezati, E; Casale Brunet, S; Mattavelli, M. JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL, IMAGE, AND VIDEO TECHNOLOGY -
A Bandwidth-Efficient Emulator of Biologically-Relevant Spiking Neural Networks on FPGA 1-gen-2022 Leone, G; Raffo, L; Meloni, P IEEE ACCESS -
Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing 1-gen-2017 Sau, Carlo; Palumbo, Francesca; Pelcat, M; Heulot, J; Nogues, E; Menard, D; Meloni, Paolo; Raffo, Luigi IEEE EMBEDDED SYSTEMS LETTERS -
Combining on-hardware prototyping and high-level simulation for DSE of multi-ASIP systems 1-gen-2012 Meloni, Paolo; Pomata, S; Raffo, Luigi; Piscitelli, R; Pimentel, Ad - -