MELONI, PAOLO
MELONI, PAOLO
DIPARTIMENTO DI INGEGNERIA ELETTRICA ED ELETTRONICA
A Bandwidth-Efficient Emulator of Biologically-Relevant Spiking Neural Networks on FPGA
2022-01-01 Leone, G; Raffo, L; Meloni, P
A custom MPSoC architecture with integrated power management for real-time neural signal decoding
2014-01-01 Carta, N; Meloni, Paolo; Tuveri, Giuseppe; Pani, Danilo; Raffo, Luigi
A high-efficiency runtime reconfigurable IP for CNN acceleration on a mid-range all-programmable SoC
2016-01-01 Meloni, Paolo; Deriu, Gianfranco; Conti, Francesco; Loi, Igor; Raffo, Luigi; Benini, Luca
A Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs
2007-01-01 Angiolini, F; Meloni, Paolo; Carta, SALVATORE MARIO; Raffo, Luigi; Benini, L.
A low overhead self-adaptation technique for KPN applications on NoC-based MPSoCs
2013-01-01 Derin, O; Ramankutty, P; Meloni, Paolo; Tuveri, Giuseppe
A runtime adaptive H.264 video-decoding MPSoC platform
2013-01-01 Tuveri, Giuseppe; Secchi, S; Meloni, Paolo; Raffo, Luigi; Cannella, E.
A stream buffer mechanism for pervasive splitting transformations on polyhedral process networks
2014-01-01 Meloni, Paolo; Tuveri, Giuseppe; Raffo, Luigi; Loi, I; Conti, F.
A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project
2013-01-01 Derin, O; Cannella, E; Tuveri, Giuseppe; Meloni, Paolo; Stefanov, T; Fiorin, L; Raffo, Luigi; Sami, M.
Adaptivity support for MPSoCs based on process migration in polyhedral process networks
2012-01-01 Cannella, E; Derin, O; Meloni, Paolo; Tuveri, Giuseppe; Stefanov, T.
ALOHA: A Unified Platform-Aware Evaluation Method for CNNs Execution on Heterogeneous Systems at the Edge
2021-01-01 Busia, Paola; Minakova, Svetlana; Stefanov, Todor; Raffo, Luigi; Meloni, Paolo
ALOHA: An architectural-aware framework for deep learning at the edge
2018-01-01 Meloni, P.; Loi, D.; Deriu, G.; Ripolles, O.; Solans, D.; Pimentel, A. D.; Sapra, D.; Pintor, Maura; Biggio, B.; Moser, B.; Shepeleva, N.; Stefanov, T.; Minakova, S.; Conti, F.; Benini, L.; Fragoulis, N.; Theodorakopoulos, I.; Masin, M.; Palumbo, F.
An Adaptable Cognitive Microcontroller Node for Fitness Activity Recognition
2022-01-01 Scrugli, M. A.; Blazica, B.; Meloni, P.
An Adaptive Cognitive Sensor Node for ECG Monitoring in the Internet of Medical Things
2022-01-01 Scrugli, M. A.; Loi, D.; Raffo, L.; Meloni, P.
An Automated Design Flow for Adaptive Neural Network Hardware Accelerators
2023-01-01 Ratto, F.; Mainez, A. P.; Sau, C.; Meloni, P.; Deriu, G.; Delucchi, S.; Massa, M.; Raffo, L.; Palumbo, F.
An FPGA platform for real-time simulation of spiking neuronal networks
2017-01-01 Pani, Danilo; Meloni, Paolo; Tuveri, Giuseppe; Palumbo, Francesca; Massobrio, Paolo; Raffo, Luigi
An FPGA Research Environment for Rapid MPSoC Exploration
2009-01-01 Secchi, S; Meloni, Paolo; Raffo, Luigi
An FPGA-Based Framework for Technology-Aware Prototyping of Multicore Embedded Architectures
2010-01-01 Meloni, Paolo; Secchi, S; Raffo, Luigi
Architecture-aware design and implementation of CNN algorithms for embedded inference: The ALOHA project
2018-01-01 Meloni, P.; Loi, D.; Deriu, G.; Pimentel, A. D.; Saprat, D.; Pintor, M.; Biggio, B.; Ripolles, O.; Solans, D.; Conti, F.; Benini, L.; Stefanov, T.; Minakova, S.; Moser, B.; Shepeleva, N.; Masin, M.; Palumbo, F.; Fragoulis, N.; Theodorakopoulos, I.
Area and Power Modeling for Networks-on-Chip with Layout Awareness
2007-01-01 Meloni, Paolo; Loi, I; Angiolini, F; Carta, SALVATORE MARIO; Barbaro, Massimo; Raffo, Luigi; Benini, L.
Area and Power Modeling Methodologies for Networks-on-Chip
2006-01-01 Meloni, Paolo; Carta, SALVATORE MARIO; R., Argiolas; Raffo, Luigi; F., Angiolini
| Titolo | Data di pubblicazione | Autore(i) | Rivista | Editore |
|---|---|---|---|---|
| A Bandwidth-Efficient Emulator of Biologically-Relevant Spiking Neural Networks on FPGA | 1-gen-2022 | Leone, G; Raffo, L; Meloni, P | IEEE ACCESS | - |
| A custom MPSoC architecture with integrated power management for real-time neural signal decoding | 1-gen-2014 | Carta, N; Meloni, Paolo; Tuveri, Giuseppe; Pani, Danilo; Raffo, Luigi | IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS | - |
| A high-efficiency runtime reconfigurable IP for CNN acceleration on a mid-range all-programmable SoC | 1-gen-2016 | Meloni, Paolo; Deriu, Gianfranco; Conti, Francesco; Loi, Igor; Raffo, Luigi; Benini, Luca | - | Institute of Electrical and Electronics Engineers |
| A Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs | 1-gen-2007 | Angiolini, F; Meloni, Paolo; Carta, SALVATORE MARIO; Raffo, Luigi; Benini, L. | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | - |
| A low overhead self-adaptation technique for KPN applications on NoC-based MPSoCs | 1-gen-2013 | Derin, O; Ramankutty, P; Meloni, Paolo; Tuveri, Giuseppe | - | IEEE |
| A runtime adaptive H.264 video-decoding MPSoC platform | 1-gen-2013 | Tuveri, Giuseppe; Secchi, S; Meloni, Paolo; Raffo, Luigi; Cannella, E. | - | IEEE |
| A stream buffer mechanism for pervasive splitting transformations on polyhedral process networks | 1-gen-2014 | Meloni, Paolo; Tuveri, Giuseppe; Raffo, Luigi; Loi, I; Conti, F. | ACM INTERNATIONAL CONFERENCE PROCEEDINGS SERIES | ACM Digital Library |
| A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project | 1-gen-2013 | Derin, O; Cannella, E; Tuveri, Giuseppe; Meloni, Paolo; Stefanov, T; Fiorin, L; Raffo, Luigi; Sami, M. | MICROPROCESSORS AND MICROSYSTEMS | - |
| Adaptivity support for MPSoCs based on process migration in polyhedral process networks | 1-gen-2012 | Cannella, E; Derin, O; Meloni, Paolo; Tuveri, Giuseppe; Stefanov, T. | VLSI DESIGN | - |
| ALOHA: A Unified Platform-Aware Evaluation Method for CNNs Execution on Heterogeneous Systems at the Edge | 1-gen-2021 | Busia, Paola; Minakova, Svetlana; Stefanov, Todor; Raffo, Luigi; Meloni, Paolo | IEEE ACCESS | - |
| ALOHA: An architectural-aware framework for deep learning at the edge | 1-gen-2018 | Meloni, P.; Loi, D.; Deriu, G.; Ripolles, O.; Solans, D.; Pimentel, A. D.; Sapra, D.; Pintor, Maura; Biggio, B.; Moser, B.; Shepeleva, N.; Stefanov, T.; Minakova, S.; Conti, F.; Benini, L.; Fragoulis, N.; Theodorakopoulos, I.; Masin, M.; Palumbo, F. | - | Association for Computing Machinery |
| An Adaptable Cognitive Microcontroller Node for Fitness Activity Recognition | 1-gen-2022 | Scrugli, M. A.; Blazica, B.; Meloni, P. | - | Springer |
| An Adaptive Cognitive Sensor Node for ECG Monitoring in the Internet of Medical Things | 1-gen-2022 | Scrugli, M. A.; Loi, D.; Raffo, L.; Meloni, P. | IEEE ACCESS | - |
| An Automated Design Flow for Adaptive Neural Network Hardware Accelerators | 1-gen-2023 | Ratto, F.; Mainez, A. P.; Sau, C.; Meloni, P.; Deriu, G.; Delucchi, S.; Massa, M.; Raffo, L.; Palumbo, F. | JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL, IMAGE, AND VIDEO TECHNOLOGY | - |
| An FPGA platform for real-time simulation of spiking neuronal networks | 1-gen-2017 | Pani, Danilo; Meloni, Paolo; Tuveri, Giuseppe; Palumbo, Francesca; Massobrio, Paolo; Raffo, Luigi | FRONTIERS IN NEUROSCIENCE | - |
| An FPGA Research Environment for Rapid MPSoC Exploration | 1-gen-2009 | Secchi, S; Meloni, Paolo; Raffo, Luigi | - | - |
| An FPGA-Based Framework for Technology-Aware Prototyping of Multicore Embedded Architectures | 1-gen-2010 | Meloni, Paolo; Secchi, S; Raffo, Luigi | IEEE EMBEDDED SYSTEMS LETTERS | - |
| Architecture-aware design and implementation of CNN algorithms for embedded inference: The ALOHA project | 1-gen-2018 | Meloni, P.; Loi, D.; Deriu, G.; Pimentel, A. D.; Saprat, D.; Pintor, M.; Biggio, B.; Ripolles, O.; Solans, D.; Conti, F.; Benini, L.; Stefanov, T.; Minakova, S.; Moser, B.; Shepeleva, N.; Masin, M.; Palumbo, F.; Fragoulis, N.; Theodorakopoulos, I. | - | Institute of Electrical and Electronics Engineers Inc. |
| Area and Power Modeling for Networks-on-Chip with Layout Awareness | 1-gen-2007 | Meloni, Paolo; Loi, I; Angiolini, F; Carta, SALVATORE MARIO; Barbaro, Massimo; Raffo, Luigi; Benini, L. | VLSI DESIGN | - |
| Area and Power Modeling Methodologies for Networks-on-Chip | 1-gen-2006 | Meloni, Paolo; Carta, SALVATORE MARIO; R., Argiolas; Raffo, Luigi; F., Angiolini | - | - |