SAU, CARLO
 Distribuzione geografica
Continente #
EU - Europa 62.400
NA - Nord America 2.353
AS - Asia 390
AF - Africa 1
Continente sconosciuto - Info sul continente non disponibili 1
SA - Sud America 1
Totale 65.146
Nazione #
IT - Italia 61.906
US - Stati Uniti d'America 2.345
CN - Cina 247
SE - Svezia 157
UA - Ucraina 151
SG - Singapore 83
DE - Germania 43
GB - Regno Unito 42
FI - Finlandia 40
VN - Vietnam 30
FR - Francia 20
BE - Belgio 13
CA - Canada 8
ES - Italia 8
NL - Olanda 8
KR - Corea 6
IR - Iran 5
RU - Federazione Russa 5
IL - Israele 4
TW - Taiwan 4
HK - Hong Kong 3
TR - Turchia 3
CZ - Repubblica Ceca 2
DK - Danimarca 2
BR - Brasile 1
CY - Cipro 1
EU - Europa 1
GR - Grecia 1
IE - Irlanda 1
IN - India 1
IQ - Iraq 1
JP - Giappone 1
KE - Kenya 1
MY - Malesia 1
NO - Norvegia 1
Totale 65.146
Città #
Cagliari 59.958
Uta 1.798
Fairfield 330
Woodbridge 247
Chandler 213
Ashburn 192
Houston 188
Ann Arbor 142
Seattle 141
Boardman 127
Wilmington 125
Cambridge 117
Nyköping 103
Dearborn 85
Jacksonville 71
Shanghai 48
Beijing 38
Nanjing 35
Singapore 35
Dong Ket 30
Boston 25
Helsinki 21
San Diego 19
Redwood City 16
Los Angeles 15
Nanchang 14
Brussels 13
Sassari 13
Jiaxing 11
Kunming 10
Washington 9
Orange 8
Amsterdam 7
Changsha 7
Jinan 7
Mountain View 7
Quartu Sant'Elena 7
Turin 7
Atlanta 6
Decimomannu 6
Hebei 6
La Maddalena 6
New York 6
Tianjin 6
Hangzhou 5
Irvine 5
Madrid 5
Rome 5
Shenyang 5
Toronto 5
Alghero 4
Azor 4
London 4
Milan 4
Stuttgart 4
Guangzhou 3
Hefei 3
Millbury 3
Norwalk 3
Olbia 3
Phoenix 3
Taichung 3
Anaheim 2
Auburn Hills 2
Baricella 2
Borås 2
Clifton 2
Copenhagen 2
Edinburgh 2
Fuzhou 2
Granada 2
Hillsboro 2
Hong Kong 2
Hounslow 2
Jinhua 2
Maracalagonis 2
Ningbo 2
Pau 2
Porto Torres 2
Rennes 2
Salt Lake City 2
Shenzhen 2
Yeongdeungpo-gu 2
Yiwu 2
Acton 1
Baghdad 1
Baotou 1
Baunei 1
Billings 1
Bologna 1
Brno 1
Cedar Knolls 1
Centro 1
Changchun 1
Chaoyang 1
Chengdu 1
Chicago 1
Chizhou 1
Chongqing 1
Dalian 1
Totale 64.406
Nome #
Automated Design Flow for Multi-Functional Dataflow-Based Platforms 3.003
Adaptable AES implementation with power-gating support 2.774
Neu Pow: Artificial Neural Networks for Power and Behavioral Modeling of Arithmetic Components in 45nm ASICs Technology 2.531
Early Stage Automatic Strategy for Power-Aware Signal Processing Systems Design 2.454
Power modelling for saving strategies in coarse grained reconfigurable systems 2.387
Modelling and automated implementation of optimal power saving strategies in coarse-grained reconfigurable architectures 2.383
Power and clock gating modelling in coarse grained reconfigurable systems 2.359
Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing 2.261
Power-awarness in coarse-grained reconfigurable designs: A dataflow based strategy 2.255
Reconfigurable Coprocessors Synthesis in the MPEG-RVC Domain 2.166
An integrated hardware/software design methodology for signal processing systems 2.135
Power-Awarness in Coarse-Grained Reconfigurable Multi-Functional Architectures: a Dataflow Based Strategy 2.066
Automated power gating methodology for dataflow-based reconfigurable systems 1.910
Computing swarms for self-adaptiveness and self-organizationin floating-point array processing 1.864
Runtime Energy versus Quality Tuning in Motion Compensation Filters for HEVC 1.784
Coarse-grained reconfiguration: dataflow-based power management 1.752
Multi-Grain Reconfiguration for Advanced Adaptivity in Cyber-Physical Systems 1.722
Hardware design methodology using lightweight dataflow and its integration with low power techniques 1.713
SS-design: Dataflow-based design of coarse-grained: Reconfigurable platforms reconfigurable platform composer tool project - Extended abstract 1.659
A nature-inspired adaptive floating-point coprocessing system 1.619
Automated design flow for coarse-grained reconfigurable platforms: An RVC-CAL multi-standard decoder use-case 1.601
Dataflow-functional high-level synthesis for coarse-grained reconfigurable accelerators 1.595
A coarse-grained reconfigurable approach for low-power spike sorting architectures 1.572
Feasibility study of real-time spiking neural network simulations on a swarm intelligence based digital architecture 1.571
Automatic Generation of Dataflow-Based Reconfigurable Co-processing Units 1.431
DSE and profiling of multi-context coarse-grained reconfigurable systems 1.340
Challenging CPS trade-off adaptivity with coarse-grained reconfiguration 1.265
CERBERO: Cross-layer modEl-based fRamework for multi-oBjective dEsign of Reconfigurable systems in unceRtain hybRid envirOnments 1.221
NeuPow: A CAD Methodology for High-level Power Estimation Based on Machine Learning 917
Dataflow based design suite for the development and management of multi-functional reconfigurable systems 916
Feasibility study and porting of the damped least square algorithm on FPGA 911
Mutual Impact between Clock Gating and High Level Synthesis in Reconfigurable Hardware Accelerators 906
null 840
null 822
Reconfigurable Adaptive Multiple Transform Hardware Solutions for Versatile Video Coding 675
The FitOptiVis ECSEL Project: Highly Efficient Distributed Embedded Image/Video Processing in Cyber-Physical Systems Invited Paper 661
Demo: Reconfigurable Platform Composer Tool 538
Runtime adaptive iomt node on multi-core processor platform 532
An Automated Design Flow for Adaptive Neural Network Hardware Accelerators 452
The Multi-Dataflow Composer tool: An open-source tool suite for optimized coarse-grain reconfigurable hardware accelerators and platform design 451
Run-time Performance Monitoring of Heterogenous Hw/Sw Platforms Using PAPI 447
Design and management of image processing pipelines within CPS: Acquired experience towards the end of the FitOptiVis ECSEL Project 420
A coarse-grained reconfigurable wavelet denoiser exploiting the multi-dataflow composer tool 379
Multithread Accelerators on FPGAs: A Dataflow-Based Approach 345
Layering the monitoring action for improved flexibility and overhead control: Work-in-progress 313
A Composable Monitoring System for Heterogeneous Embedded Platforms 184
Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL Project 97
null 89
Reconfigurable and approximate computing for video coding 81
Totale 65.369
Categoria #
all - tutte 75.515
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 75.515


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2019/202010.931 0 0 0 0 4.046 3.098 1.632 359 428 543 329 496
2020/202115.764 777 601 802 4.698 3.000 1.396 1.270 852 387 645 861 475
2021/20223.777 401 392 185 220 268 356 127 106 300 433 562 427
2022/20234.254 236 465 322 414 311 540 326 241 298 327 478 296
2023/20245.517 335 158 185 284 449 875 557 447 161 376 890 800
2024/202511.793 3.180 5.149 1.735 1.694 35 0 0 0 0 0 0 0
Totale 65.369