UNICA IRIS Institutional Research Information System

MELONI, PAOLO
 Distribuzione geografica
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Continente #
EU - Europa 113.126
NA - Nord America 6.587
AS - Asia 3.038
SA - Sud America 359
AF - Africa 63
OC - Oceania 9
Continente sconosciuto - Info sul continente non disponibili 5
Totale 123.187
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Nazione #
IT - Italia 111.562
US - Stati Uniti d'America 6.444
SG - Singapore 1.155
CN - Cina 1.097
SE - Svezia 376
UA - Ucraina 336
BR - Brasile 271
VN - Vietnam 239
DE - Germania 211
FI - Finlandia 168
FR - Francia 143
GB - Regno Unito 130
HK - Hong Kong 116
CA - Canada 94
IN - India 84
BD - Bangladesh 55
KR - Corea 45
NL - Olanda 33
TR - Turchia 32
PL - Polonia 26
AR - Argentina 25
MX - Messico 25
ES - Italia 24
IQ - Iraq 24
JP - Giappone 23
BE - Belgio 19
CO - Colombia 19
ZA - Sudafrica 18
PK - Pakistan 17
TW - Taiwan 16
MA - Marocco 15
SA - Arabia Saudita 14
PH - Filippine 13
AT - Austria 12
RU - Federazione Russa 12
UZ - Uzbekistan 12
VE - Venezuela 12
DK - Danimarca 11
GR - Grecia 11
CL - Cile 10
LT - Lituania 10
LV - Lettonia 10
EC - Ecuador 9
ID - Indonesia 9
IR - Iran 9
TN - Tunisia 9
MY - Malesia 8
KG - Kirghizistan 7
NP - Nepal 7
AZ - Azerbaigian 6
IL - Israele 6
JM - Giamaica 6
AE - Emirati Arabi Uniti 5
AU - Australia 5
CZ - Repubblica Ceca 5
ET - Etiopia 5
EU - Europa 5
JO - Giordania 5
CH - Svizzera 4
CR - Costa Rica 4
IE - Irlanda 4
KZ - Kazakistan 4
MN - Mongolia 4
OM - Oman 4
PE - Perù 4
PT - Portogallo 4
BO - Bolivia 3
DO - Repubblica Dominicana 3
DZ - Algeria 3
KE - Kenya 3
LK - Sri Lanka 3
LU - Lussemburgo 3
PY - Paraguay 3
SV - El Salvador 3
TH - Thailandia 3
UY - Uruguay 3
AM - Armenia 2
BY - Bielorussia 2
CG - Congo 2
CY - Cipro 2
EE - Estonia 2
GE - Georgia 2
HN - Honduras 2
KW - Kuwait 2
NI - Nicaragua 2
NO - Norvegia 2
NZ - Nuova Zelanda 2
PS - Palestinian Territory 2
RO - Romania 2
AO - Angola 1
BB - Barbados 1
BG - Bulgaria 1
GT - Guatemala 1
IS - Islanda 1
KH - Cambogia 1
KY - Cayman, isole 1
LA - Repubblica Popolare Democratica del Laos 1
LB - Libano 1
LY - Libia 1
MG - Madagascar 1
Totale 123.174
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Città #
Cagliari 107.636
Uta 3.491
Singapore 647
Ashburn 608
Fairfield 599
San Jose 419
Chandler 388
Woodbridge 354
Dallas 337
Houston 300
Seattle 256
Wilmington 254
Boardman 244
Nyköping 240
Cambridge 230
Ann Arbor 218
Beijing 210
Los Angeles 176
Jacksonville 169
Council Bluffs 106
Helsinki 105
Shanghai 105
Dearborn 104
Santa Clara 103
Hong Kong 100
Nanjing 85
Ho Chi Minh City 77
Lauterbourg 77
The Dalles 77
Hefei 74
Chicago 69
New York 69
Buffalo 58
Guangzhou 58
Boston 51
Hanoi 48
Ottawa 47
Seoul 41
San Diego 40
Rome 38
Munich 34
Frankfurt am Main 30
Sassari 29
Redwood City 25
Washington 25
Milan 24
Warsaw 23
Dong Ket 22
Nanchang 22
Redondo Beach 22
Salt Lake City 22
Atlanta 21
Tianjin 21
Nuremberg 20
Jiaxing 19
London 19
Orem 19
Brooklyn 18
Brussels 18
Denver 18
Jinan 18
Changsha 15
Chennai 15
Tokyo 15
Toronto 15
Montreal 14
Shenyang 14
Kunming 13
São Paulo 13
Taipei 13
Amsterdam 12
Brasília 12
Hangzhou 12
Phoenix 12
Pune 12
San Francisco 12
Baghdad 11
Elk Grove Village 11
Johannesburg 11
Mountain View 11
Shenzhen 11
Belo Horizonte 10
Orange 10
Riga 10
Düsseldorf 9
Haiphong 9
Lappeenranta 9
Mexico City 9
Tampa 9
Tashkent 9
Turku 9
Casablanca 8
Copenhagen 8
Da Nang 8
Istanbul 8
Manchester 8
Rio de Janeiro 8
Ankara 7
Bishkek 7
Biên Hòa 7
Totale 119.193
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Nome #
MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation 3.408
Automated Design Flow for Multi-Functional Dataflow-Based Platforms 3.174
An FPGA platform for real-time simulation of spiking neuronal networks 3.070
FPGA-Based Emulation Support for Design Space Exploration 2.876
Real-time neural signals decoding onto off-the-shelf DSP processors for neuroprosthetic applications 2.849
Optimization and deployment of CNNs at the Edge: The ALOHA experience 2.662
Neuraghe: exploiting CPU-FPGA synergies for efficient and flexible CNN inference acceleration on zynQ SoCs 2.659
Modelling and automated implementation of optimal power saving strategies in coarse-grained reconfigurable architectures 2.610
Power modelling for saving strategies in coarse grained reconfigurable systems 2.583
System adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project approach 2.567
Power and clock gating modelling in coarse grained reconfigurable systems 2.537
Exploring custom heterogeneous MPSoCs for real-time neural signal decoding 2.526
Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing 2.467
Exploiting binary translation for fast ASIP design space exploration on FPGAs 2.399
ALOHA: An architectural-aware framework for deep learning at the edge 2.315
Reconfigurable Coprocessors Synthesis in the MPEG-RVC Domain 2.306
The multi-dataflow composer tool: generation of on-the-fly reconfigurable platforms 2.294
Power-Awarness in Coarse-Grained Reconfigurable Multi-Functional Architectures: a Dataflow Based Strategy 2.262
ASAM: Automatic architecture synthesis and application mapping 2.247
Curbing the roofline: A scalable and flexible architecture for CNNs on FPGA 2.205
Exploiting All Programmable SoCs in Neural Signal Analysis: A Closed-Loop Control for Large-Scale CMOS Multielectrode Arrays 2.204
A stream buffer mechanism for pervasive splitting transformations on polyhedral process networks 1.999
A high-efficiency runtime reconfigurable IP for CNN acceleration on a mid-range all-programmable SoC 1.976
Runtime Energy versus Quality Tuning in Motion Compensation Filters for HEVC 1.935
Online process transformation for polyhedral process networks in shared-memory MPSoCs 1.897
ALOHA: A Unified Platform-Aware Evaluation Method for CNNs Execution on Heterogeneous Systems at the Edge 1.887
A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project 1.841
Sustainable water management in quality wine-making 1.831
SS-design: Dataflow-based design of coarse-grained: Reconfigurable platforms reconfigurable platform composer tool project - Extended abstract 1.823
Architecture-aware design and implementation of CNN algorithms for embedded inference: The ALOHA project 1.729
A low overhead self-adaptation technique for KPN applications on NoC-based MPSoCs 1.715
On-the-fly adaptivity for process networks over shared-memory platforms 1.703
A runtime adaptive H.264 video-decoding MPSoC platform 1.673
Enabling fast ASIP design space exploration: An FPGA-based runtime reconfigurable prototyper 1.661
ASAM: Automatic Architecture Synthesis and Application Mapping 1.638
Adaptivity support for MPSoCs based on process migration in polyhedral process networks 1.622
null 1.597
Feasibility study of real-time spiking neural network simulations on a swarm intelligence based digital architecture 1.571
null 1.460
null 1.198
ZyON: Enabling Spike Sorting on APSoC-Based Signal Processors for High-Density Microelectrode Arrays 1.177
Routing Aware Switch Hardware Customization for Networks on Chips 1.136
Area and Power Modeling for Networks-on-Chip with Layout Awareness 1.126
A Bandwidth-Efficient Emulator of Biologically-Relevant Spiking Neural Networks on FPGA 1.115
Combining on-hardware prototyping and high-level simulation for DSE of multi-ASIP systems 1.092
Enabling fast Network-on-Chip topology selection: an FPGA-based runtime reconfigurable prototyper 1.063
Methods for hardware reduction and overall performance improvement in communication systems 1.040
Exploiting FPGAs for technology-aware system-level evaluation of multi-core architectures 1.033
An FPGA-Based Framework for Technology-Aware Prototyping of Multicore Embedded Architectures 1.007
Optimizing the serialization factor in Networks-on-Chip: a case of study 995
Synthesis of predictable networks-on-chip-based interconnect Architectures for chip multiprocessors 994
Area and Power Modeling Methodologies for Networks-on-Chip 928
An FPGA Research Environment for Rapid MPSoC Exploration 921
On the impact of serializatioin on the cache performances in Network-on-Chip based MPSoCs 920
A Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs 918
Designing Routing and Message-Dependent Deadlock Free Networks on Chips 913
Contrasting a NoC and a Traditional Interconnect Fabric with Layout Awareness 909
Exploring NEURAghe: A Customizable Template for APSoC-Based CNN Inference at the Edge 887
Networks on Chips: A Synthesis Perspective 886
NoC Design and Implementation in 65nm Technology 871
Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs 861
Designing Application-Specific Networks on Chips with Floorplan Information 854
Dynamic Pruning for Parsimonious CNN Inference on Embedded Systems 850
Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems-on-Chips 838
On-FPGA Spiking Neural Networks for End-to-End Neural Decoding 815
An Adaptive Cognitive Sensor Node for ECG Monitoring in the Internet of Medical Things 803
A custom MPSoC architecture with integrated power management for real-time neural signal decoding 758
Flexible acceleration of convolutions on FPGAs: Planning NEURAghe 2.0 739
Demo: Reconfigurable Platform Composer Tool 725
Runtime adaptive iomt node on multi-core processor platform 713
An Adaptable Cognitive Microcontroller Node for Fitness Activity Recognition 698
Runtime-adaptive cognitive IoT nodes 690
An Automated Design Flow for Adaptive Neural Network Hardware Accelerators 676
Target-Aware Neural Architecture Search and Deployment for Keyword Spotting 665
On-FPGA real-time processing of biological signals from high-density MEAs: A design space exploration 662
Design and optimization techniques for VLSI Network on Chip architectures 613
Task-Specific Automation in Deep Learning Processes 560
Reducing False Alarms in Wearable Seizure Detection with EEGformer: A Compact Transformer Model for MCUs 515
EEGformer: Transformer-Based Epilepsy Detection on Raw EEG Traces for Low-Channel-Count Wearable Continuous Monitoring Devices 501
Real-Time sEMG Processing with Spiking Neural Networks on a Low-Power 5K-LUT FPGA 451
Optimizing Temporal Convolutional Network Inference on FPGA-Based Accelerators 351
A tiny transformer for low-power arrhythmia classification on microcontrollers 320
Design of an AI-driven Architecture with Cobots for Digital Transformation to Enhance Quality Control in the Food Industry 240
SYNtzulu: A Tiny RISC-V-Controlled SNN Processor for Real-Time Sensor Data Analysis on Low-Power FPGAs 228
null 199
Low-Power FPGA-based Spiking Neural Networks for Real-Time Decoding of Intracortical Neural Activity 168
On-FPGA Spiking Neural Networks for Integrated Near-Sensor ECG Analysis 166
A Runtime-Adaptive Cognitive IoT Node for Healthcare Monitoring 154
Wearable epilepsy seizure detection on FPGA with spiking neural networks 146
null 122
null 103
sEMG-based gesture recognition with spiking neural networks on low-power FPGA 92
ESTU: Enabling Spiking Transformers on Ultra-Low-Power FPGAs 89
Exploiting FPGAs and spiking neural networks at the micro-Edge: the EdgeAI approach 71
Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs 54
Endoscopy Image Classification for Wireless Capsules with CNNs on Microcontroller-Based Platforms 51
All-Spiking ECG Analysis for Arrhythmia Classification on Low-Power FPGA 44
CNN hardware acceleration on a low-power and low-cost APSoC 2
Totale 123.494
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Categoria #
all - tutte 157.845
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 157.845
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/2021757 0 0 0 0 0 0 0 0 0 0 0 757
2021/20225.803 742 529 197 341 502 472 217 150 462 879 719 593
2022/20239.239 609 1.155 926 944 811 1.032 508 679 616 582 941 436
2023/202410.968 568 380 496 545 1.047 1.628 1.740 696 474 831 1.488 1.075
2024/202527.861 3.278 10.616 3.119 3.074 2.788 2.477 1.299 131 207 199 412 261
2025/20267.436 485 272 741 444 529 372 2.142 353 557 786 510 245
Totale 123.494