UNICA IRIS Institutional Research Information System

MELONI, PAOLO
 Distribuzione geografica
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Continente #
EU - Europa 113.563
NA - Nord America 7.255
AS - Asia 3.126
SA - Sud America 372
Continente sconosciuto - Info sul continente non disponibili 318
AF - Africa 69
OC - Oceania 9
Totale 124.712
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Nazione #
IT - Italia 111.959
US - Stati Uniti d'America 7.084
SG - Singapore 1.174
CN - Cina 1.106
SE - Svezia 385
UA - Ucraina 337
BR - Brasile 276
VN - Vietnam 242
DE - Germania 212
FI - Finlandia 168
FR - Francia 150
GB - Regno Unito 142
HK - Hong Kong 121
CA - Canada 111
IN - India 102
BD - Bangladesh 83
KR - Corea 45
NL - Olanda 34
TR - Turchia 32
PL - Polonia 27
JP - Giappone 26
AR - Argentina 25
ES - Italia 25
MX - Messico 25
IQ - Iraq 24
CO - Colombia 21
BE - Belgio 19
ZA - Sudafrica 18
PK - Pakistan 17
MA - Marocco 16
TW - Taiwan 16
EC - Ecuador 14
SA - Arabia Saudita 14
PH - Filippine 13
AT - Austria 12
RU - Federazione Russa 12
UZ - Uzbekistan 12
VE - Venezuela 12
DK - Danimarca 11
GR - Grecia 11
CL - Cile 10
IR - Iran 10
LT - Lituania 10
LV - Lettonia 10
ID - Indonesia 9
NP - Nepal 9
TN - Tunisia 9
MY - Malesia 8
IE - Irlanda 7
JM - Giamaica 7
KG - Kirghizistan 7
AZ - Azerbaigian 6
CZ - Repubblica Ceca 6
IL - Israele 6
AE - Emirati Arabi Uniti 5
AU - Australia 5
CR - Costa Rica 5
ET - Etiopia 5
EU - Europa 5
JO - Giordania 5
PE - Perù 5
CH - Svizzera 4
KZ - Kazakistan 4
MN - Mongolia 4
OM - Oman 4
PT - Portogallo 4
SN - Senegal 4
SV - El Salvador 4
BO - Bolivia 3
DO - Repubblica Dominicana 3
DZ - Algeria 3
EE - Estonia 3
GT - Guatemala 3
KE - Kenya 3
LK - Sri Lanka 3
LU - Lussemburgo 3
NI - Nicaragua 3
PY - Paraguay 3
SC - Seychelles 3
TH - Thailandia 3
UY - Uruguay 3
AM - Armenia 2
BG - Bulgaria 2
BY - Bielorussia 2
CG - Congo 2
CY - Cipro 2
GE - Georgia 2
HN - Honduras 2
KW - Kuwait 2
NO - Norvegia 2
NZ - Nuova Zelanda 2
PS - Palestinian Territory 2
RO - Romania 2
TT - Trinidad e Tobago 2
AO - Angola 1
BB - Barbados 1
BS - Bahamas 1
DM - Dominica 1
IS - Islanda 1
KH - Cambogia 1
Totale 124.381
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Città #
Cagliari 107.937
Uta 3.491
Ashburn 732
Singapore 657
Fairfield 599
San Jose 482
Chandler 388
Woodbridge 354
Dallas 349
Houston 301
Seattle 257
Wilmington 254
Boardman 244
Nyköping 240
Cambridge 230
Ann Arbor 218
Beijing 214
Los Angeles 191
Jacksonville 169
Council Bluffs 161
Santa Clara 129
New York 107
Helsinki 105
Shanghai 105
Dearborn 104
Hong Kong 104
Nanjing 85
Ho Chi Minh City 78
Lauterbourg 77
The Dalles 77
Hefei 74
Chicago 73
Buffalo 60
Guangzhou 60
Boston 52
Rome 51
Hanoi 49
Milan 47
Ottawa 47
San Diego 41
Seoul 41
Munich 34
Frankfurt am Main 31
Sassari 29
Phoenix 26
Washington 26
Atlanta 25
Columbus 25
Redwood City 25
Denver 24
Warsaw 23
Dong Ket 22
Nanchang 22
Redondo Beach 22
Salt Lake City 22
Brooklyn 21
Tianjin 21
Nuremberg 20
Toronto 20
Jiaxing 19
London 19
Orem 19
Brussels 18
Jinan 18
Montreal 17
Tokyo 17
Chennai 16
Changsha 15
São Paulo 15
Shenyang 14
Brasília 13
Kunming 13
Pune 13
Taipei 13
Amsterdam 12
Hangzhou 12
San Francisco 12
Baghdad 11
Elk Grove Village 11
Johannesburg 11
Mountain View 11
Shenzhen 11
Belo Horizonte 10
Naples 10
Orange 10
Riga 10
Staranzano 10
Tampa 10
Turin 10
Düsseldorf 9
Haiphong 9
Lappeenranta 9
Manchester 9
Mexico City 9
Newark 9
Paris 9
Tashkent 9
Turku 9
Bengaluru 8
Casablanca 8
Totale 119.969
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Nome #
MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation 3.422
Automated Design Flow for Multi-Functional Dataflow-Based Platforms 3.183
An FPGA platform for real-time simulation of spiking neuronal networks 3.087
FPGA-Based Emulation Support for Design Space Exploration 2.880
Real-time neural signals decoding onto off-the-shelf DSP processors for neuroprosthetic applications 2.864
Neuraghe: exploiting CPU-FPGA synergies for efficient and flexible CNN inference acceleration on zynQ SoCs 2.670
Optimization and deployment of CNNs at the Edge: The ALOHA experience 2.669
Modelling and automated implementation of optimal power saving strategies in coarse-grained reconfigurable architectures 2.623
Power modelling for saving strategies in coarse grained reconfigurable systems 2.591
System adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project approach 2.571
Power and clock gating modelling in coarse grained reconfigurable systems 2.547
Exploring custom heterogeneous MPSoCs for real-time neural signal decoding 2.532
Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing 2.485
Exploiting binary translation for fast ASIP design space exploration on FPGAs 2.404
ALOHA: An architectural-aware framework for deep learning at the edge 2.326
Reconfigurable Coprocessors Synthesis in the MPEG-RVC Domain 2.315
The multi-dataflow composer tool: generation of on-the-fly reconfigurable platforms 2.297
Power-Awarness in Coarse-Grained Reconfigurable Multi-Functional Architectures: a Dataflow Based Strategy 2.271
ASAM: Automatic architecture synthesis and application mapping 2.254
Exploiting All Programmable SoCs in Neural Signal Analysis: A Closed-Loop Control for Large-Scale CMOS Multielectrode Arrays 2.222
Curbing the roofline: A scalable and flexible architecture for CNNs on FPGA 2.213
A stream buffer mechanism for pervasive splitting transformations on polyhedral process networks 2.016
A high-efficiency runtime reconfigurable IP for CNN acceleration on a mid-range all-programmable SoC 1.985
Runtime Energy versus Quality Tuning in Motion Compensation Filters for HEVC 1.936
Online process transformation for polyhedral process networks in shared-memory MPSoCs 1.908
ALOHA: A Unified Platform-Aware Evaluation Method for CNNs Execution on Heterogeneous Systems at the Edge 1.902
A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project 1.851
Sustainable water management in quality wine-making 1.848
SS-design: Dataflow-based design of coarse-grained: Reconfigurable platforms reconfigurable platform composer tool project - Extended abstract 1.837
Architecture-aware design and implementation of CNN algorithms for embedded inference: The ALOHA project 1.738
A low overhead self-adaptation technique for KPN applications on NoC-based MPSoCs 1.725
On-the-fly adaptivity for process networks over shared-memory platforms 1.714
A runtime adaptive H.264 video-decoding MPSoC platform 1.682
Enabling fast ASIP design space exploration: An FPGA-based runtime reconfigurable prototyper 1.668
ASAM: Automatic Architecture Synthesis and Application Mapping 1.645
Adaptivity support for MPSoCs based on process migration in polyhedral process networks 1.626
null 1.597
Feasibility study of real-time spiking neural network simulations on a swarm intelligence based digital architecture 1.571
null 1.460
null 1.198
ZyON: Enabling Spike Sorting on APSoC-Based Signal Processors for High-Density Microelectrode Arrays 1.182
Routing Aware Switch Hardware Customization for Networks on Chips 1.142
Area and Power Modeling for Networks-on-Chip with Layout Awareness 1.137
A Bandwidth-Efficient Emulator of Biologically-Relevant Spiking Neural Networks on FPGA 1.123
Combining on-hardware prototyping and high-level simulation for DSE of multi-ASIP systems 1.097
Methods for hardware reduction and overall performance improvement in communication systems 1.064
Enabling fast Network-on-Chip topology selection: an FPGA-based runtime reconfigurable prototyper 1.064
Exploiting FPGAs for technology-aware system-level evaluation of multi-core architectures 1.038
Synthesis of predictable networks-on-chip-based interconnect Architectures for chip multiprocessors 1.015
An FPGA-Based Framework for Technology-Aware Prototyping of Multicore Embedded Architectures 1.012
Optimizing the serialization factor in Networks-on-Chip: a case of study 1.003
Area and Power Modeling Methodologies for Networks-on-Chip 935
A Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs 928
An FPGA Research Environment for Rapid MPSoC Exploration 928
On the impact of serializatioin on the cache performances in Network-on-Chip based MPSoCs 924
Designing Routing and Message-Dependent Deadlock Free Networks on Chips 920
Contrasting a NoC and a Traditional Interconnect Fabric with Layout Awareness 912
Exploring NEURAghe: A Customizable Template for APSoC-Based CNN Inference at the Edge 899
Networks on Chips: A Synthesis Perspective 891
NoC Design and Implementation in 65nm Technology 879
Dynamic Pruning for Parsimonious CNN Inference on Embedded Systems 868
Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs 865
Designing Application-Specific Networks on Chips with Floorplan Information 863
Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems-on-Chips 849
On-FPGA Spiking Neural Networks for End-to-End Neural Decoding 829
An Adaptive Cognitive Sensor Node for ECG Monitoring in the Internet of Medical Things 815
A custom MPSoC architecture with integrated power management for real-time neural signal decoding 770
Flexible acceleration of convolutions on FPGAs: Planning NEURAghe 2.0 750
Runtime adaptive iomt node on multi-core processor platform 733
Demo: Reconfigurable Platform Composer Tool 731
An Adaptable Cognitive Microcontroller Node for Fitness Activity Recognition 727
Runtime-adaptive cognitive IoT nodes 701
An Automated Design Flow for Adaptive Neural Network Hardware Accelerators 689
Target-Aware Neural Architecture Search and Deployment for Keyword Spotting 681
On-FPGA real-time processing of biological signals from high-density MEAs: A design space exploration 672
Design and optimization techniques for VLSI Network on Chip architectures 625
Task-Specific Automation in Deep Learning Processes 572
Reducing False Alarms in Wearable Seizure Detection with EEGformer: A Compact Transformer Model for MCUs 530
EEGformer: Transformer-Based Epilepsy Detection on Raw EEG Traces for Low-Channel-Count Wearable Continuous Monitoring Devices 524
Real-Time sEMG Processing with Spiking Neural Networks on a Low-Power 5K-LUT FPGA 487
Optimizing Temporal Convolutional Network Inference on FPGA-Based Accelerators 364
A tiny transformer for low-power arrhythmia classification on microcontrollers 342
Design of an AI-driven Architecture with Cobots for Digital Transformation to Enhance Quality Control in the Food Industry 265
SYNtzulu: A Tiny RISC-V-Controlled SNN Processor for Real-Time Sensor Data Analysis on Low-Power FPGAs 244
Low-Power FPGA-based Spiking Neural Networks for Real-Time Decoding of Intracortical Neural Activity 199
null 199
On-FPGA Spiking Neural Networks for Integrated Near-Sensor ECG Analysis 179
Wearable epilepsy seizure detection on FPGA with spiking neural networks 170
A Runtime-Adaptive Cognitive IoT Node for Healthcare Monitoring 154
ESTU: Enabling Spiking Transformers on Ultra-Low-Power FPGAs 139
sEMG-based gesture recognition with spiking neural networks on low-power FPGA 125
null 122
All-Spiking ECG Analysis for Arrhythmia Classification on Low-Power FPGA 112
Exploiting FPGAs and spiking neural networks at the micro-Edge: the EdgeAI approach 105
null 103
Endoscopy Image Classification for Wireless Capsules with CNNs on Microcontroller-Based Platforms 67
Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs 63
Enabling Plasticity in FPGA-Based SNNs: an EEG Seizure Detection Study 29
WCE-SqueezeNet: Targeting on-capsule CNN inference for energy efficient microcontroller-based endoscopy 22
CNN hardware acceleration on a low-power and low-cost APSoC 2
Totale 124.712
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Categoria #
all - tutte 163.029
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 163.029
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/20224.335 0 0 0 341 502 472 217 150 462 879 719 593
2022/20239.239 609 1.155 926 944 811 1.032 508 679 616 582 941 436
2023/202410.968 568 380 496 545 1.047 1.628 1.740 696 474 831 1.488 1.075
2024/202527.861 3.278 10.616 3.119 3.074 2.788 2.477 1.299 131 207 199 412 261
2025/20267.440 485 272 741 444 529 372 2.142 353 557 786 510 249
2026/20271.214 178 358 446 232 0 0 0 0 0 0 0 0
Totale 124.712