UNICA IRIS Institutional Research Information System

PALUMBO, FRANCESCA
 Distribuzione geografica
Salva come PNG Salva come JPEG
Continente #
EU - Europa 100.661
NA - Nord America 6.375
AS - Asia 2.562
Continente sconosciuto - Info sul continente non disponibili 416
SA - Sud America 322
AF - Africa 76
OC - Oceania 9
Totale 110.421
Salva come PNG Salva come JPEG
Nazione #
IT - Italia 99.416
US - Stati Uniti d'America 6.222
SG - Singapore 995
CN - Cina 935
UA - Ucraina 275
SE - Svezia 266
BR - Brasile 242
VN - Vietnam 209
DE - Germania 142
FI - Finlandia 138
FR - Francia 116
GB - Regno Unito 113
CA - Canada 77
HK - Hong Kong 73
IN - India 70
BD - Bangladesh 69
NL - Olanda 40
MA - Marocco 39
AR - Argentina 29
RU - Federazione Russa 29
KR - Corea 28
MX - Messico 24
TR - Turchia 24
PL - Polonia 22
ES - Italia 21
JP - Giappone 19
IE - Irlanda 18
IQ - Iraq 17
AT - Austria 16
BE - Belgio 16
IL - Israele 16
CO - Colombia 12
EC - Ecuador 12
PH - Filippine 12
PK - Pakistan 12
JM - Giamaica 11
LT - Lituania 9
SA - Arabia Saudita 9
ZA - Sudafrica 8
CL - Cile 7
ID - Indonesia 7
UZ - Uzbekistan 7
CR - Costa Rica 6
IR - Iran 6
JO - Giordania 6
MY - Malesia 6
VE - Venezuela 6
AU - Australia 5
AZ - Azerbaigian 5
CZ - Repubblica Ceca 5
GT - Guatemala 5
HN - Honduras 5
KE - Kenya 5
PE - Perù 5
PR - Porto Rico 5
TN - Tunisia 5
BO - Bolivia 4
CW - ???statistics.table.value.countryCode.CW??? 4
EG - Egitto 4
LK - Sri Lanka 4
NI - Nicaragua 4
SC - Seychelles 4
SV - El Salvador 4
TT - Trinidad e Tobago 4
TW - Taiwan 4
AE - Emirati Arabi Uniti 3
BY - Bielorussia 3
NP - Nepal 3
NZ - Nuova Zelanda 3
PS - Palestinian Territory 3
QA - Qatar 3
TH - Thailandia 3
AL - Albania 2
BG - Bulgaria 2
DK - Danimarca 2
DZ - Algeria 2
ET - Etiopia 2
EU - Europa 2
HR - Croazia 2
KG - Kirghizistan 2
KZ - Kazakistan 2
LV - Lettonia 2
PY - Paraguay 2
UY - Uruguay 2
AM - Armenia 1
BF - Burkina Faso 1
BH - Bahrain 1
BS - Bahamas 1
BZ - Belize 1
CG - Congo 1
CH - Svizzera 1
CI - Costa d'Avorio 1
CY - Cipro 1
DO - Repubblica Dominicana 1
EE - Estonia 1
GE - Georgia 1
GP - Guadalupe 1
GR - Grecia 1
HT - Haiti 1
IM - Isola di Man 1
Totale 109.994
Salva come PNG Salva come JPEG
Città #
Cagliari 96.463
Uta 2.562
Ashburn 726
Singapore 529
Fairfield 472
San Jose 408
Woodbridge 385
Dallas 297
Chandler 296
Houston 276
Boardman 236
Wilmington 206
Seattle 198
Ann Arbor 196
Cambridge 187
Beijing 177
Nyköping 157
Council Bluffs 156
Los Angeles 146
Jacksonville 137
Santa Clara 123
Dearborn 119
New York 97
Shanghai 88
Helsinki 87
Hong Kong 69
Nanjing 69
Lauterbourg 66
Ho Chi Minh City 65
Rome 51
Buffalo 49
Hefei 45
Boston 43
Atlanta 34
Phoenix 33
Chicago 32
Dong Ket 32
Hanoi 32
Casablanca 31
San Diego 31
The Dalles 31
Redwood City 28
Columbus 27
Amsterdam 26
Guangzhou 26
São Paulo 25
Denver 23
Brooklyn 22
Princeton 22
Seoul 22
Milan 20
Montreal 19
Orem 19
Tianjin 19
Changsha 18
Nanchang 18
Nuremberg 18
Sassari 18
Dublin 17
Toronto 17
Warsaw 16
Brussels 15
Frankfurt am Main 15
Jiaxing 15
Mountain View 15
Munich 15
Tokyo 15
Turin 15
Chennai 14
London 14
Hangzhou 13
Kunming 13
Washington 13
La Maddalena 12
Ottawa 12
Shenyang 12
Jinan 11
Lappeenranta 11
North Bergen 11
Redondo Beach 11
Düsseldorf 10
Mumbai 10
Hebei 9
Mexico City 9
Orange 9
Philadelphia 9
Vienna 9
Haiphong 8
Norwalk 8
San Francisco 8
Shenzhen 8
Elk Grove Village 7
Kingston 7
Madrid 7
Naples 7
Salt Lake City 7
Tashkent 7
Xi'an 7
Alghero 6
Amman 6
Totale 106.267
Salva come PNG Salva come JPEG
Nome #
MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation 3.428
Automated Design Flow for Multi-Functional Dataflow-Based Platforms 3.190
An FPGA platform for real-time simulation of spiking neuronal networks 3.096
Adaptable AES implementation with power-gating support 2.975
Neu Pow: Artificial Neural Networks for Power and Behavioral Modeling of Arithmetic Components in 45nm ASICs Technology 2.710
Optimization and deployment of CNNs at the Edge: The ALOHA experience 2.682
Modelling and automated implementation of optimal power saving strategies in coarse-grained reconfigurable architectures 2.628
Power modelling for saving strategies in coarse grained reconfigurable systems 2.594
Power and clock gating modelling in coarse grained reconfigurable systems 2.555
null 2.541
Exploring custom heterogeneous MPSoCs for real-time neural signal decoding 2.540
Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing 2.505
Power-awarness in coarse-grained reconfigurable designs: A dataflow based strategy 2.410
An integrated hardware/software design methodology for signal processing systems 2.347
ALOHA: An architectural-aware framework for deep learning at the edge 2.335
Reconfigurable Coprocessors Synthesis in the MPEG-RVC Domain 2.321
The multi-dataflow composer tool: generation of on-the-fly reconfigurable platforms 2.300
Power-Awarness in Coarse-Grained Reconfigurable Multi-Functional Architectures: a Dataflow Based Strategy 2.280
Profiling of Dataflow-Based Coarse-Grained Reconfigurable Platforms 2.125
Automated power gating methodology for dataflow-based reconfigurable systems 2.090
Computing swarms for self-adaptiveness and self-organizationin floating-point array processing 2.046
Runtime Energy versus Quality Tuning in Motion Compensation Filters for HEVC 1.941
Coarse-grained reconfiguration: dataflow-based power management 1.929
Multi-Grain Reconfiguration for Advanced Adaptivity in Cyber-Physical Systems 1.892
Hardware design methodology using lightweight dataflow and its integration with low power techniques 1.869
SS-design: Dataflow-based design of coarse-grained: Reconfigurable platforms reconfigurable platform composer tool project - Extended abstract 1.843
Dataflow-functional high-level synthesis for coarse-grained reconfigurable accelerators 1.784
A nature-inspired adaptive floating-point coprocessing system 1.775
Architecture-aware design and implementation of CNN algorithms for embedded inference: The ALOHA project 1.748
On-the-fly adaptivity for process networks over shared-memory platforms 1.723
A coarse-grained reconfigurable approach for low-power spike sorting architectures 1.706
null 1.697
Automatic Generation of Dataflow-Based Reconfigurable Co-processing Units 1.603
Feasibility study of real-time spiking neural network simulations on a swarm intelligence based digital architecture 1.571
Concurrent hybrid switching for massively parallel systems-on-chip: The CYBER architecture 1.470
null 1.423
Challenging CPS trade-off adaptivity with coarse-grained reconfiguration 1.266
CERBERO: Cross-layer modEl-based fRamework for multi-oBjective dEsign of Reconfigurable systems in unceRtain hybRid envirOnments 1.221
A fast MPI-based parallel framework for cycle-accurate HDL multi-parametric simulations 1.174
NeuPow: A CAD Methodology for High-level Power Estimation Based on Machine Learning 1.164
Low power design methodology for signal processing systems using lightweight dataflow techniques 1.138
Feasibility study and porting of the damped least square algorithm on FPGA 1.107
Impact of half-duplex and full-duplex DMA Implementations on NoC performance 1.059
Design IP Faster: Introducing the C~ High-Level Language 979
Towards self-adaptive networks on chip for massively parallel processors: Multilevel quality of service programmability 966
The multi-dataflow composer tool: A runtime reconfigurable HDL platform composer 948
A coarse-grained reconfigurable wavelet denoiser exploiting the multi-dataflow composer tool 914
null 876
Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs 872
Reconfigurable Adaptive Multiple Transform Hardware Solutions for Versatile Video Coding 838
null 831
null 822
RVC: A multi-decoder CAL Composer tool 818
sysCgrid – SystemC grid simulation framework 791
Non-Exclusive Dual-Mode Approach for NoC Designs 785
Demo: Reconfigurable Platform Composer Tool 739
Coarse-Grained Reconfigurable Approach for Multi-Dataflow Systems 739
A multithread AES accelerator for Cyber-Physical Systems 718
An Automated Design Flow for Adaptive Neural Network Hardware Accelerators 699
The FitOptiVis ECSEL Project: Highly Efficient Distributed Embedded Image/Video Processing in Cyber-Physical Systems Invited Paper 661
The Multi-Dataflow Composer tool: An open-source tool suite for optimized coarse-grain reconfigurable hardware accelerators and platform design 660
Design and management of image processing pipelines within CPS: Acquired experience towards the end of the FitOptiVis ECSEL Project 615
Run-time Performance Monitoring of Heterogenous Hw/Sw Platforms Using PAPI 602
Multithread Accelerators on FPGAs: A Dataflow-Based Approach 541
A Composable Monitoring System for Heterogeneous Embedded Platforms 401
A surface tension and coalescence model for dynamic distributed resources allocation in Massively Parallel Processors on-Chip 401
Hybrid switching techniques for heterogeneous traffic support in multi-processors system on chip and massively parallel processors 375
A Network on Chip Architecture for Heterogeneous Traffic Support with Non-Exclusive Dual-Mode Switching 365
A Novel Non-Exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs 362
Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL Project 292
PathTracer: Understanding Response Time of Signal Processing Applications on Heterogeneous MPSoCs 267
A Dataflow Implementation of Inverse Kinematics on Reconfigurable Heterogeneous MPSoC 262
MYRTUS: Multi-layer 360° dYnamic orchestration and interopeRable design environmenT for compute-continUum Systems 257
In-field automatic detection of grape bunches under a totally uncontrolled environment 251
PathTracing: Raising the level of understanding of processing latency in heterogeneous MPSoCs 250
Unmanned vehicles in smart farming: A survey and a glance at future horizons 238
Elicitation of technical requirements in large research projects: The CERBERO approach 206
Adaptive software-augmented hardware reconfiguration with dataflow design automation 194
Runtime reconfigurable FPGA accelerator for tactile texture classification based shallow CNN 187
Reconfigurable and approximate computing for video coding 186
Message from the Program Chairs 168
Dataflow modeling for reconfigurable signal processing systems 154
Cross-layer design of reconfigurable cyber-physical systems 153
Exploring the performance of partially reconfigurable point-to-point interconnects 143
An FPGA-based accelerator design methodology for smart UAVs in precision agriculture: A case study 129
Adaptive CNN acceleration on FPGAs: closing the gap with state-of-the-art solutions 124
Multi-Partner Project: Key Enabling Technologies for Cognitive Computing Continuum - MYRTUS Project Perspective 112
Integrating FPGA-Based Acceleration in Industrial Motion Control System 100
FPGA-based Implementation for Industrial Motion Control System 100
ONNX-To-Hardware Design Flow for Adaptive Neural-Network Inference on FPGAs 96
SECURED for health: Scaling up privacy to enable the integration of the european health data space 94
Hardware/Software Self-adaptation in CPS: The CERBERO Project Approach 76
Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs 70
Early Stage Automatic Strategy for Power-Aware Signal Processing Systems Design 69
Automated design flow for coarse-grained reconfigurable platforms: An RVC-CAL multi-standard decoder use-case 47
Multi-purpose systems: A novel dataflow-based generation and mapping strategy 39
DSE and profiling of multi-context coarse-grained reconfigurable systems 38
Totale 110.421
Salva come PNG Salva come JPEG
Categoria #
all - tutte 141.420
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 141.420
Salva come PNG Salva come JPEG


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/20223.754 0 0 0 0 429 522 194 151 439 671 755 593
2022/20236.458 399 719 565 619 522 720 394 577 440 462 644 397
2023/20248.159 481 285 334 393 680 1.350 843 616 322 579 1.179 1.097
2024/202523.529 4.093 7.993 2.449 2.457 2.557 1.831 1.492 69 133 122 139 194
2025/20266.416 354 204 540 509 625 425 1.142 641 415 933 440 188
2026/20271.535 106 280 412 637 100 0 0 0 0 0 0 0
Totale 110.421